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V810 Dissasembler v1.04
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USAGE

v810_ds2 <infile> <outfile> [<start address> <bytes>]

infile - vbrom to dissasemble
outfile - name of .asm fiel

start address - start offset into the rom (optional)
bytes - total number of bytes to dump (optional)

the ASM syntax loosly folows that of my V810 asmblr, there might be discrepincys...  the whole syntax is a hogpog of tasm, motorola asm, and the apropriet v810 asm,  I am hoping to rework it back into the oficial v810 asm format, now that I have found the v810 asmblr instruction manual....

for reference all constants with no leader are in decimal form (Printf can not print a signed hex value...)  0xXXX is hex and 0XXX is oct.

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Change Log
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v1.04 11/23/98 
  Eliminated a fiew minor Printf Bugs... Need to add in the FPU oppcodes.  There in already, just not right

v1.03 9/24/98

  I reworked the case statments so It should be dissasembling instructions properly now, This should be my last fix (for now).  I think working on the emu Is more important...  I also took the time to package this up for general consumption, but consider this undocumented and unsuported! (If you find a bug let me know, maby Ill fix it, otherwise dont complain, unless your willing to solve the problems yourself =0)

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v1.02 5/20/98

  I took the liberty of rewriting the case statement in the main loop of the dissasembler,  Now all instructions are indexed in an array (Jump table of sorts)  with 2 fields, the instruction format (I, II, III, IV, I, VI, VII, VIII, IX, BSTR(BitString), FPP(Floating Point), UNDEF(Undefined/Error)), and the asembler nmonic 'add',  This way you can handle simular instructions  together (all type I's etc)  It realy cuts down on the size of the main loop.  Also I was getting strange errors  from the dissasembler (dissasembling FF FF as several different instructions)  but this has compleatly eliminated all thoes errors (I think visual C++ was doing some optimizing on the Case statment that was messing it up)  I think I got some of the Instructions backwards (mixing up the order the operands print out)  and I dont handle some of the special cases (trap etc...)  But its sompthing to look at.

  I got the Idea from looking at a TG16 Dissasembler (Ill send it along)  they implemented a lot of other cool tricks (like buffering the reads from the file, this should speed up dissasembly a lot), I wanted to implement some of them, but I need to get back to work =) 

  I dident realy need to mess with the dissasembler (Works great as it stands)  but Im going to start on a crude CPU emulator (so we can start to trace through the code better)  and I wanted to try out a feaw ideas on sompthing smaller, before I spend a lot of time on it.  In perticular I want to use this trick for a debugger, Ill still need to do a case statment off of the instruction names to emulate them ( cant generalize there)  but at least I can narow it down by instruction format, this will eliminate a lot of redundant code.

  Im looking into working on an assembler as well, but That will wait untill my tracer is going.  I figured you could use the same scheem, only reverse it (trickle through the instruction array untill we found our instruction, then format it acording to the Instruction format (I, II, etc).  There is probably a better way thoe, I havent seen any demo code for an assembler yet.

  I should be getting in my flash roms by monday, so maby we can start downloading code into the VB within a week =)

David Tucker
dbt@dana.ucc.nau.edu

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v1.01 5/15/98

    Ive modified the dissasembler slightly It now can take 2 optional prameters, the starting address, and the number of bytes to dissasemble...  I patched this in in about 5 minuts, and It could be done a lot better, first it takes values in regular int (base 10) instead of hex , and Im not shure what it would do on realy larg filez?  but with a litle bit of work you can actualy dissasemble pices of code and not the whole thing (a real time saver =)

  Ive included some dissasembles of the vector table (located at the very end of the roms (it apears that the roms load at address ffff ffff and dowm in memory,  the code at FFFF FFF0 is most significant, this is the jump to the start of the program, there is also usualy code at FFFF FE00 - FFFF FE40  this is the maskable interupt table (at least part of it)  all other interupts are eather filled in with a halt or a reti,  Im not shure what theas 4 mascable interupts do, but some roms implement handlers for them and some just put halt and reti (it apears that all put halt? on FE10 and FE40...   All addresses in the jumps etc assume the rom has ben placed a ffff ffff and down, sow to translate them just subtract the end of the rom from this number ie 7ffff(for pbommber)  to get an offset, then subtract this offset from all internal jumps to get the properlocation into the rom...

Ive included a disasembly for Mario tennis:
  MTN_INT.asm - the actual interupt jump table
  MTN_INTC.asm  the code that is executed from the jump table, this is the actual boot code... =)

Of other interest Ive included a dissasembly of the Glactic pinball jump table, of interest is the fact that the Dissasembler didnot handle this code well, it got confused, some how it wass dissasembling on an odd? byte boundry? (Im assuming this code should be dissasembled on dword boundrys, and it was dissasembling on  the midle of the dword after hiting a reti instruction)  This is just sompthing to look into, maby Im wrong, I shure have not found mutch usfull info from the PDF files form NEC, on instructions...

Anyway If this is right =)  It looks like there is enough info hear to start making a rudimentry proccesor emulator, maby by tracing through the code we can begin to map out the memory...

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David Tucker
dbt@dana.ucc.nau.edu
http://dana.ucc.nau.edu/~dbt/VBMain.html